This invention relates to integrated circuit devices and operating methods, and more particularly to reference voltage generators and voltage generation methods for integrated circuits.
Integrated circuit devices are widely used in consumer and commercial applications. In particular, integrated circuit memory devices continue to increase in integration density and speed, while allowing reduced power consumption. For example, synchronous Dynamic Random Access Memories (DRAMs) that can operate in synchronization with system clocks have been developed to allow high speed operation. Dual data rate (DDR) synchronous DRAMs also have been developed to allow high performance memory devices.
Electronic systems such as data processing systems, often use buses including a plurality of signal lines, to interconnect integrated circuit devices, so that the integrated circuit devices can communicate with one another. Output drivers are generally included in microprocessor, logic and/or memory integrated circuits in order to drive signals that are internally generated in the integrated circuit onto the bus. These output drivers are generally driven by voltage level signals.
Recently, however, in order to achieve high speed operations and/or other advantages, integrated circuit devices that include current mode output drivers have been provided. The use of current mode output drivers can reduce the peak switching current and signal reflections on the bus, to thereby allow low power, high performance communications between integrated circuits.
One technology that uses current mode output drivers is the Rambus technology that is marketed by Rambus, Inc., Mountain View, Calif. The Rambus technology is described in U.S. Pat. No. 5,473,575 to Farmwald et al., U.S. Pat. No. 5,578,940 to Dillon et al., U.S. Pat. No. 5,606,717 to Farmwald et al. and U.S. Pat. No. 5,663,661 to Dillon et al. Also see U.S. Pat. No. 6,072,747 to Yoon that is assigned to the assignee of the present invention. Integrated circuit devices that include current mode output drivers will also be referred to herein as Rambus devices.
Rambus devices may operate at high data rate, for example at data rates at up to 800 MHz or more. In order to operate at these high data rates, it may be desirable to control the output drivers of Rambus DRAMs. Moreover, large amounts of data may be simultaneously read from memory cell arrays in Rambus DRAMs, so that large amounts of power may be consumed. In order to reduce the power consumption, it is known to provide output drivers for Rambus DRAMs that have a current drive capability which varies according to the loads on the output drivers, for example on the output pads thereof. Other integrated circuit devices including logic and/or memory devices also may have output drivers that have a current drive capability that varies according to the output load.
FIG. 1 is a block diagram showing a conventional output driver control scheme that may be used, for example, in a Rambus DRAM. Referring to FIG. 1, a reference voltage regulator 13 generates a reference voltage and provides the reference voltage Vgate to a reference voltage distributor 12. The reference voltage distributor 12 selectively activates output signals, referred to as gate enable signals Envg less than 6:0 greater than  to have the level of the reference voltage Vgate, in response to current drive capability control signals Ictl less than 6:0 greater than  during activation of an output enable signal Vgen. The current drive capability of an output driver 11 varies in response to the selective activation of the gate enable signals Envg less than 6:0 greater than . The output driver 11 receives output signals q and q1 and provides them to an output pad 15. The current drive capability control signals Ictl less than 6:0 greater than  are generated by a current control circuit 14 that senses the load of the output pad 15 and controls the current drive capability of the output driver 11.
However, since the gate enable signals Envg less than 6:0 greater than  may be applied to large numbers of output drivers in common, the lines used for transmitting the gate enable signals Envg less than 6:0 greater than  may be very long so that the loads of the lines may be large. Accordingly, when activating the lines used for transmitting the gate enable signals Envg less than 6:0 greater than  to the level of the reference voltage Vgate, a great deal of charge may be consumed, which may result in a drop of the output voltage of the reference voltage regulator 13, referred to as the reference voltage Vgate. Consequently, it may take excessive time to stabilize the lines for transmitting the gate enable signals Envg less than 6:0 greater than  at the level of the reference voltage Vgate. This may cause the output operation of the Rambus DRAM or other integrated circuit to slow down and/or may cause the device to malfunction.
The current output capability of the reference voltage regulator 13 may be made very large to recover the drop of the reference voltage Vgate within a short time. Unfortunately, a high current reference voltage regulator 13 may consume excessive power, which can result in an increase of the power consumption of the integrated circuit.
Embodiments of the present invention provide reference voltage regulators and methods for integrated circuit output driver systems, by generating an initial supplementary current for the integrated circuit output driver system at the reference voltage for a predetermined time period in response to an output enable signal. Preferably, sufficient initial supplementary current is generated to compensate for an initial drop in the reference voltage that is generated by a reference voltage generator upon initial activation of the output driver system.
More specifically, reference voltage generators according to embodiments of the invention may be included in an integrated circuit output driver system that is responsive to a reference voltage and to an output enable signal, and that varies in current drive capability in response to a current drive control signal These embodiments of reference voltage regulators include a reference voltage generator that generates the reference voltage for the integrated circuit output driver system. A supplementary current generator generates an initial supplementary current for the integrated circuit output driver system at the reference voltage for a predetermined time period in response to the output enable signal In some embodiments, the supplementary current generator generates a fixed initial supplementary current for the integrated circuit output driver system. In other embodiments, the supplementary current generator generates a variable initial supplementary current for the integrated circuit output driver system at the reference voltage for the predetermined time period in response to the output enable signal, and that varies in response to the current drive control signal.
Embodiments of reference voltage regulators according to the present invention may be used with integrated circuits that include an output driver which varies in current drive capability in response to the selective activation of a plurality of gate enable signals. The integrated circuits also include a reference voltage distributor that receives a reference voltage and selectively activates the gate enable signals to provide a reference voltage in response to a plurality of current drive capability control signals during activation of an output enable signal. The integrated circuits also include a current control circuit that senses a load on the output driver and generates the current drive capability control signals. The reference voltage regulators include a reference voltage generator that generates the reference voltage and provides the reference voltage to the reference voltage distributor. The reference voltage regulators also include a reference voltage compensator that provides the current to an output terminal of the reference voltage generator for a predetermined period of time, to compensate for a drop in the reference voltage in response to the output enable signal.
In some embodiments, the reference voltage compensator is further controlled by the current drive capability control signals, to vary the current supply to the output terminal of the reference voltage generator.
In other embodiments, the reference voltage compensator includes an automatic pulse generator that generates a pulse signal in response to the activation of the output signal for the predetermined period of time, and a current supply circuit that supplies the current to the output terminal of the reference voltage generator in response to the pulse signal of the automatic pulse generator. In yet other embodiments, a plurality of automatic pulse generators may be provided, each of which generates a pulse signal in response to the activation of the output enable signal for the predetermined period of time, while a corresponding one of the current drive capability control signals is activated. A plurality of current supply circuits also may be provided, each of which supplies current to the output terminal of the reference voltage generator, in response to the output signal of the corresponding automatic pulse generator.
Reference voltage regulators and methods according to embodiments of the present invention can at least partially compensate for the drop in the reference voltage within a short time, without the need to increase the current capacity of the reference voltage generator. Accordingly, for example, in Rambus DRAM devices according to embodiments of the present invention, the gate enable signals can be stabilized rapidly at the level of the reference voltage. High speed operation may be maintained, and malfunctions may not be induced.